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International Journal of Applied Research
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ISSN Print: 2394-7500, ISSN Online: 2394-5869, CODEN: IJARPF

Impact Factor: RJIF 5.2

International Journal of Applied Research

Vol. 1, Issue 7, Part E (2015)

Design and implementation of LDPC decoder using time domain-AMS processing

Author(s)
Shirisha S, K Nirmala Kumari
Abstract
At the cost of limitedrnaccuracy, analog computation is more energy efficient and area efficient. Onrnother side, digital computation is more versatile and achieves greater benefitsrnfrom technology scaling. Time Domain analog mixed signalrnprocessing(TD-AMS)utilizes both digital and analog computation advantages, andrnit is better solution which suits in implementing a system on chip and alsornincludes functions which does not require high accuracy, like voicerntransmitting, image processing, error correction codes etc. An example, a lowrndensity parity check (LDPC) decoder is implemented using TD-AMS technique, inrnXilinx ISE 14.5 and target family Spartan 3E,Device XC7A100T,speedrn-3,package:CSG324. Proposed Binary Search TDC is implemented using TD-AMSrntechnique, which achieves less area and less delay compared to conventionalrnTDC.
Pages: 271-276  |  467 Views  14 Downloads
How to cite this article:
Shirisha S, K Nirmala Kumari. Design and implementation of LDPC decoder using time domain-AMS processing. International Journal of Applied Research. 2015; 1(7): 271-276.
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