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International Journal of Applied Research
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ISSN Print: 2394-7500, ISSN Online: 2394-5869, CODEN: IJARPF

IMPACT FACTOR (RJIF): 8.4

Vol. 1, Issue 7, Part F (2015)

Design of Low-Dropout Regulato

Design of Low-Dropout Regulato

Author(s)
Nikitha V, Prabhavathi P
Abstract
For diminishing the standby power and boosting the effectiveness of battery life time in portable and handheld devices, power management is required. Low Dropout regulator is one of such a power management module. Proposed LDO design converts an input voltage of 1 V to tunable output voltage range of 0.5 V to 0.932 V which is implemented in 90nm technology. The designed LDO has a very less quiescent current of 0.4µA and less dropout voltage of 68mV producing a current efficiency of 99.99%.
Pages: 323-330  |  1140 Views  100 Downloads
How to cite this article:
Nikitha V, Prabhavathi P. Design of Low-Dropout Regulato. Int J Appl Res 2015;1(7):323-330.
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